VPX (VITA 46.0) uses the MultiGig (tm) connector.
The fact that the connector has 7 rows of vias on the daughter card and 9 rows of vias in the backplane is very confusing.
This illustration attempts to clarify how the signal assignments really are connected and how the differential signal pairs are
arranged on the odd and even wafers making up a full 16 wafer assembly.

This would be typical of the J1/P1 connector pair which carries the four primary fabric channels for VPX. Each of these
channels consist of 4 Tx pairs and 4 Rx pairs. and can be called an "x4" channel or a "fat pipe"  The 16 wafer, MultiGig connector
used for VPX supports 4 fat pipes because each wafer carries one Tx differential pair and one Rx differential pair. A fat pipe
as used in VPX is often used for 10Gbps Ethernet or 10Gbps Serial Rapid IO (sRIO).
 
In VPX, when a 7 row daughter card connector mates with a 9 row backplane connector all the signals will be connected properly:



Fat Pipes, Thin Pipes and Ultra-thin Pipes

A channel consisting of  4 Tx pairs and 4 Rx pairs is sometimes called an "x4" channel and may be referred to as a "fat pipe.
This "x4 channel can also carry 10 Gbs Ethernet as defined within IEEE 802.3ap for the 10GBase-KX4.

Gigabit Ethernet such as 1000 Base-T  would represent a "x2" channel consisting of 2 Tx pairs and 2 Rx pairs. This x2 channel is sometimes referred to as a thin pipe.

An "x1" channel consisting of 1 Tx pair and 1 Rx pair is sometimes referred to as an ultra-thin pipe. An ultra-thin pipe can carry 1Gbp Ethernet
as defined for 1GBase-KX or 10 Gbs Ethernet as defined for 10GBase-KR

MultiGig is a trademark of Tyco Electronic Packaging. VPX is an architecture defined by the VME International Trade Association.
Serial Rapid IO is a term defined by the Rapid IO Trade Association. Photo courtesy of Tyco Electronic Packaging and drawing and
charts adapted from VPX literature. The modified illustrations are courtesy of Elma Bustronic Corporation.

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